A Novel Interleaved Non-Isolated Ultra High Step-Up DC-DC Converter with ZVS Performance
Abstract
This paper presents an interleaved nonisolated DC-DC converter with high voltage gain and zero voltage switching (ZVS) performance. Both coupled inductor and voltage multiplier cell (VMC) techniques are used to increase voltage gain. The ZVS circuit is composed of an active clamp which is in series with the output filter capacitors. This will give rise to further extension of the voltage gain. Applying the interleaving technique at the input of the converter, the ripple of the input current is reduced. Due to the leakage inductances of coupled inductors, the diodes are turned-off under zero current switching (ZCS) condition. Hence the reverse current recovery problem is alleviated. The steady state analysis of the proposed converter is also presented. Finally, a 900V-415W laboratory prototype is implemented to validate the performance of the proposed converter
EXISTING SYSTEM:
he converter can reach high voltage gain at low duty cycles and the voltage stress across semiconductors is reduced. However, the main drawback of these converters is hard switching operation that limits efficiency improvement. Besides, input current is pulsed and large, which give rises to increase the input capacitors and affect the PV and FC usage life. Interleaving technique has been successfully used for minimizing input current ripple. The active clamp can be utilized for soft switching operation of the coupled inductors based converters with (or without) VMCs. The proposed converter, employs an inductor at the input and operates in continuous conduction mode (CCM). The voltage is extended via both coupled inductor and VMC techniques. A CCM boost cell provides the continuous input current for the proposed converter. Where the input current ripple is relatively low. To increase the voltage step-up ratio, the output of the coupled inductor is laid on the top of the output of the CCM boost cell. The main drawback of the converters is that the active clamp circuit doesn’t participate in voltage gain enhancement. A bidirectional ZVS boost converter combined with current fed converters as a parallel input and series output (PISO) configuration has been proposed. The ZVS boost converter acts as active clamp that is connected to the output which extends the voltage gain. However, the input current is pulse shape yet. To diminish the pulsating input current, the authors suggest interleaving gate signals with two boost inductors. However, the circuit will be complex and the variation doesn’t give rise to voltage gain extension. Interleaved high step-up ZVS converter with built-in transformer and voltage doubler cell are proposed .
PROPOSED SYSTEM:
Two power MOSFETs and a common clamp capacitor are used as clamp circuit for soft switching performance and diode-capacitor VMCs are applied to extend voltage gain. The input current ripple is low and the converter can achieve high voltage gain by inserting more stages of VMCs. However, the only degree of freedom for voltage gain extension is the number of VMCs. Source impedance networks can also be used for voltage step-up. A novel high voltage A-source impedance network with continuous input current is proposed that utilizes an autotransformer for voltage gain extension. However, the maximum allowable duty cycle in these types of converters is related to the autotransformer turns ratio, inversely. This paper proposes a novel interleaved ZVS high step-up DC-DC converter with the following main features: 1- High voltage gain and low voltage stress across the semiconductors 2- ZVS operation of the power MOSFETs 3- ZCS turn-off of the diodes and alleviating of reverse current recovery problem by leakage inductances 4- Low input current ripple due to interleaving effect 5- The active clamp circuit participates in voltage step-up.
CONCLUSION
In this paper a novel interleaved high step-up DC-DC converter with ZVS performance has been presented. The proposed converter utilizes coupled inductor and VMC techniques to increase the voltage gain. The VMC consists of two regenerative diodes, two regenerative capacitors and the windings of coupled inductors. The PISO configuration for the interleaved phases allows for low input current and high voltage gain. An active clamp circuit whose output is in series with the output filter capacitors, provides the ZVS performance for the power MOSFETs and also improves voltage step-up ratio. In order to verify the effectiveness of the proposed converter, a 900V-415W laboratory prototype with 95.4% conversion efficiency was fabricated and experimented. From the comparison discussions and experimental results, it can be concluded that the proposed converter can be a good candidate for high efficient-high voltage applications such as DC micro-grids and renewable energy systems.
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