Battery Voltage Supervisors for Miniature IoT Systems
As battery size decreases due to system size constraints in miniature Internet-of-things systems, the internal resistance of the battery increases, resulting in a large IR drop on the battery voltage, complicating battery supervising functions. In this paper, we discuss low-power battery voltage supervisors (BVSs) that are capable of handling this increased IR drop. Battery voltage, battery internal resistance, required threshold voltages, and power-on-reset delay are discussed. As examples, two low-power BVSs fabricated in a 180 nm CMOS process are described.
To avoid unpredictable circuit behavior and permanent damage to a battery, a battery voltage supervisor (BVS) monitors VBAT and only enables the system when VBAT exceeds a threshold (VON), as shown in Fig. 2. To prevent oscillation due to circuit noise and error, conventional BVSs employ two fixed threshold voltages with a voltage difference of 1–10 mV –. The lower threshold voltage (VOFF) sets the lowest VBAT at which circuits operate properly and do not damage the battery. The higher threshold voltage (VON) provides hysteresis (VHYST = VON VOFF) to prevent the system from oscillating between the operation and reset modes. A voltage regulator cannot be an alternative of BVS since it does not prevent the battery from being discharged below the voltage that causes permanent damage to a battery. The IR drop problem has been an issue for high-power applications as well due to their large currents. To prevent system failure, uninterruptible power systems and battery management systems detect increased RBAT and signal a need to replace the battery –. In miniature IoT systems, however, replacing batteries can be difficult due to the sheer number of IoT nodes or difficulty of access (e.g., medical implantable device). Thus, it is more important to effectively use the battery and maximize the system functional time without incurring system oscillation.
In this paper, low-power BVSs are explored that are able to handle the increased IR drop on VBAT. A discussion of VBAT, RBAT, required VHYST, and power-on-reset delay (TPOR) is included. Also, design techniques and calibration methods for VHYST are discussed. As examples, two low-power BVSs fabricated in a 180 nm CMOS process are presented. The first BVS, referred to as large-constant-hysteresis BVS (LCHBVS), is designed for a large and constant RBAT . With a predetermined large VHYST, it solves the Fig. 5. Conventional BVS. oscillation problem associated with conventional BVSs. This design can handle an RBAT of up to 17 k_ with 635 pW power consumption. The second BVS, referred to as adaptivehysteresis BVS (AHBVS), is an extension that updates VHYST according to the RBAT measurement results . It can tolerate large and varying RBAT up to 63 k_ with a 3.6 nW power consumption. In the target systems, RBAT changes from 11 to 60 k_ after 1000 battery charge/discharge cycles in the worst case . LCHBVS is designed for the system that requires less than five battery charge/discharge cycles. The change in RBAT is negligible in such limited cycles, and 17 k_ is sufficient as the maximum RBAT coverage. AHBVS is chosen for systems that seek to maximize the lifetime. With a maximum RBAT coverage of 63 k_, the system can run for ∼1000 battery charge/discharge cycles. LCHBVS is a simpler, lower power design than AHBVS, and thus it can be a good choice for applications that experience only a small RBAT change. However, LCHBVS can be inefficient for systems with large and varying RBAT since the system must wait to be charged to a high VON, reducing the system functional time. Also, it causes the system to operate at a higher VBAT, which can accelerate battery health degradation. AHBVS overcomes these problems by using the adaptive VHYST technique at the cost of additional circuits (i.e., RBAT monitor) and 5.7× higher power. Conclusion: In this paper, battery voltage supervisors (BVSs) are explored as a means of handling a large battery internal resistance. A discussion of battery voltage, battery internal resistance, required hysteresis, power-on-reset delay for different applications, and the respective impact of each specification on BVS design is included. Two low-power BVSs fabricated in a 180 nm CMOS process are described as examples.
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